Invention Grant
US08530935B2 Semiconductor device with buffer layer for mitigating stress exerted on compound semiconductor layer
有权
具有缓冲层的半导体器件，用于减轻施加在化合物半导体层上的应力
- Patent Title: Semiconductor device with buffer layer for mitigating stress exerted on compound semiconductor layer
- Patent Title (中): 具有缓冲层的半导体器件，用于减轻施加在化合物半导体层上的应力
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Application No.: US13445243Application Date: 2012-04-12
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Publication No.: US08530935B2Publication Date: 2013-09-10
- Inventor: Masataka Yanagihara
- Applicant: Masataka Yanagihara
- Applicant Address: JP Niiza-shi
- Assignee: Sanken Electric Co., Ltd.
- Current Assignee: Sanken Electric Co., Ltd.
- Current Assignee Address: JP Niiza-shi
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-091213 20110415
- Main IPC: H01L29/12
- IPC: H01L29/12 ; H01L29/201
Abstract:
A semiconductor device includes a substrate, a buffer layer, and a compound semiconductor layer. The buffer layer is configured by laminating two or more pairs of a first buffer and a second buffer. The first buffer is formed by laminating one or more pairs of an AlN layer and a GaN layer. The second buffer is formed of a GaN layer. A total Al composition of a pair of the first buffer and the second buffer on the compound semiconductor layer side is higher than that of a pair of the first buffer and the second buffer on the substrate side.
Public/Granted literature
- US20120261716A1 SEMICONDUCTOR DEVICE Public/Granted day:2012-10-18
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