Invention Grant
- Patent Title: Controlling the device performance by forming a stressed backside dielectric layer
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Application No.: US13216843Application Date: 2011-08-24
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Publication No.: US08546886B2Publication Date: 2013-10-01
- Inventor: Ming-Fa Chen , I-Ching Lin
- Applicant: Ming-Fa Chen , I-Ching Lin
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119

Abstract:
A device includes a p-type metal-oxide-semiconductor (PMOS) device and an n-type metal-oxide-semiconductor (NMOS) device at a front surface of a semiconductor substrate. A first dielectric layer is disposed on a backside of the semiconductor substrate. The first dielectric layer applies a first stress of a first stress type to the semiconductor substrate, wherein the first dielectric layer is overlying the semiconductor substrate and overlapping a first one of the PMOS device and the NMOS device, and is not overlapping a second one of the PMOS device and the NMOS device. A second dielectric layer is disposed on the backside of the semiconductor substrate. The second dielectric layer applies a second stress to the semiconductor substrate, wherein the second stress is of a second stress type opposite to the first stress type. The second dielectric layer overlaps a second one of the PMOS device and the NMOS device.
Public/Granted literature
- US20130049127A1 Controlling the Device Performance by Forming a Stressed Backside Dielectric Layer Public/Granted day:2013-02-28
Information query
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