Invention Grant
US08654565B2 Access signal adjustment circuits and methods for memory cells in a cross-point array
有权
交叉点阵列中存储单元的访问信号调整电路和方法
- Patent Title: Access signal adjustment circuits and methods for memory cells in a cross-point array
- Patent Title (中): 交叉点阵列中存储单元的访问信号调整电路和方法
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Application No.: US13658697Application Date: 2012-10-23
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Publication No.: US08654565B2Publication Date: 2014-02-18
- Inventor: Christophe Chevallier , Chang Hua Siau
- Applicant: Unity Semiconductor Corporation
- Applicant Address: US CA Sunnyvale
- Assignee: Unity Semiconductor Corporation
- Current Assignee: Unity Semiconductor Corporation
- Current Assignee Address: US CA Sunnyvale
- Agency: Stolowitz Ford Cowger LLP
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
Embodiments of the invention relate generally to semiconductors and memory technology, and more particularly, to systems, integrated circuits, and methods to generate access signals to facilitate memory operations in scaled arrays of memory elements, such as memory implemented in third dimensional memory technology formed BEOL directly on top of a FEOL substrate that includes data access circuitry. In at least some embodiments, a non-volatile memory device can include a cross-point array having resistive memory elements disposed among word lines and subsets of bit lines, and an access signal generator. The access signal generator can be configured to modify a magnitude of a signal to generate a modified magnitude for the signal to access a resistive memory element associated with a word line and a subset of bit lines. The modified magnitude can be a function of the position of the resistive memory element in the cross-point array.
Public/Granted literature
- US20130135920A1 ACCESS SIGNAL ADJUSTMENT CIRCUITS AND METHODS FOR MEMORY CELLS IN A CROSS-POINT ARRAY Public/Granted day:2013-05-30
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