Invention Grant
- Patent Title: Method for fabricating MOS transistors
- Patent Title (中): 制造MOS晶体管的方法
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Application No.: US13332370Application Date: 2011-12-21
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Publication No.: US08716092B2Publication Date: 2014-05-06
- Inventor: Po-Lun Cheng , Pin-Chien Chu
- Applicant: Po-Lun Cheng , Pin-Chien Chu
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: United Microelectronics Corp.
- Current Assignee: United Microelectronics Corp.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A method for fabricating a MOS transistor is disclosed. First, a semiconductor substrate having a gate thereon is provided. A spacer is then formed on the sidewall of the gate, and two recesses are formed adjacent to the spacer and within the semiconductor substrate. Next, the spacer is thinned, and epitaxial layer is grown in each of the two recesses. By thinning the spacer before the epitaxial layer is formed, the present invention could stop the epitaxial layer to grow against the sidewall of the spacer, thereby preventing problem such as Ion degradation.
Public/Granted literature
- US20120094460A1 METHOD FOR FABRICATING MOS TRANSISTORS Public/Granted day:2012-04-19
Information query
IPC分类:
