Invention Grant
- Patent Title: Semiconductor processing methods
- Patent Title (中): 半导体加工方法
-
Application No.: US13858800Application Date: 2013-04-08
-
Publication No.: US08735292B2Publication Date: 2014-05-27
- Inventor: Junting Liu-Norrod , Er-Xuan Ping , Seiichi Takedai
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/302
- IPC: H01L21/302

Abstract:
Some embodiments include methods in which insulative material is simultaneously deposited across both a front side of a semiconductor substrate, and across a back side of the substrate. Subsequently, openings may be etched through the insulative material across the front side, and the substrate may then be dipped within a plating bath to grow conductive contact regions within the openings. The insulative material across the back side may protect the back side from being plated during the growth of the conductive contact regions over the front side. In some embodiments, plasma-enhanced atomic layer deposition may be utilized for the deposition, and may be conducted at a temperature suitable to anneal passivation materials so that such annealing occurs simultaneously with the plasma-enhanced atomic layer deposition.
Public/Granted literature
- US20130237056A1 Semiconductor Processing Methods Public/Granted day:2013-09-12
Information query
IPC分类: