Invention Grant
- Patent Title: Transistors with isolation regions
- Patent Title (中): 具有隔离区域的晶体管
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Application No.: US12968704Application Date: 2010-12-15
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Publication No.: US08742460B2Publication Date: 2014-06-03
- Inventor: Umesh Mishra , Srabanti Chowdhury
- Applicant: Umesh Mishra , Srabanti Chowdhury
- Applicant Address: US CA Goleta
- Assignee: Transphorm Inc.
- Current Assignee: Transphorm Inc.
- Current Assignee Address: US CA Goleta
- Agency: Fish & Richardson P.C.
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A transistor device is described that includes a source, a gate, a drain, a semiconductor material which includes a gate region between the source and the drain, a plurality of channel access regions in the semiconductor material on either side of the gate, a channel in the semiconductor material having an effective width in the gate region and in the channel access regions, and an isolation region in the gate region. The isolation region serves to reduce the effective width of the channel in the gate region without substantially reducing the effective width of the channel in the access regions. Alternatively, the isolation region can be configured to collect holes that are generated in the transistor device. The isolation region may simultaneously achieve both of these functions.
Public/Granted literature
- US20120153390A1 TRANSISTORS WITH ISOLATION REGIONS Public/Granted day:2012-06-21
Information query
IPC分类: