Invention Grant
- Patent Title: System and memory module
- Patent Title (中): 系统和内存模块
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Application No.: US13610282Application Date: 2012-09-11
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Publication No.: US08773883B2Publication Date: 2014-07-08
- Inventor: Shiro Harashima
- Applicant: Shiro Harashima
- Agency: Foley & Lardner LLP
- Priority: JP2011-199466 20110913
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G06F13/00 ; G06F12/06

Abstract:
A system includes: a controller, a first memory module connected to the controller through a first data bus, and a second memory module connected to the controller through a second data bus, wherein the first memory module includes: first and second memory chips; a first data terminal connected to the first data bus, and a first switch unit that electrical connects the first data terminal with either the first memory chip and the second memory chip, and the second module includes: third and fourth memory chips; a second data terminal connected to the second data bus, and a second switch unit that switches over electrical connection of the second data terminal with either the third memory chip or the fourth memory chip.
Public/Granted literature
- US20130063998A1 SYSTEM AND MEMORY MODULE Public/Granted day:2013-03-14
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