Invention Grant
- Patent Title: CMOS dual metal gate semiconductor device
- Patent Title (中): CMOS双金属栅极半导体器件
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Application No.: US12883241Application Date: 2010-09-16
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Publication No.: US08836038B2Publication Date: 2014-09-16
- Inventor: Yong-Tian Hou , Peng-Fu Hsu , Jin Ying , Kang-Cheng Lin , Kuo-Tai Huang , Tze-Liang Lee
- Applicant: Yong-Tian Hou , Peng-Fu Hsu , Jin Ying , Kang-Cheng Lin , Kuo-Tai Huang , Tze-Liang Lee
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater and Matsil, L.L.P.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/8238 ; H01L21/28 ; H01L29/66

Abstract:
A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a first MOS device of a first conductivity type and a second MOS device of a second conductivity type opposite the first conductivity type. The first MOS device includes a first gate dielectric on a semiconductor substrate; a first metal-containing gate electrode layer over the first gate dielectric; and a silicide layer over the first metal-containing gate electrode layer. The second MOS device includes a second gate dielectric on the semiconductor substrate; a second metal-containing gate electrode layer over the second gate dielectric; and a contact etch stop layer having a portion over the second metal-containing gate electrode layer, wherein a region between the portion of the contact etch stop layer and the second metal-containing gate electrode layer is substantially free from silicon.
Public/Granted literature
- US20110001194A1 Hybrid Process for Forming Metal Gates Public/Granted day:2011-01-06
Information query
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