Invention Grant
- Patent Title: Step-down type DC-DC regulator
- Patent Title (中): 降压式DC-DC调节器
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Application No.: US13166887Application Date: 2011-06-23
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Publication No.: US08836308B2Publication Date: 2014-09-16
- Inventor: Ken Shono
- Applicant: Ken Shono
- Applicant Address: JP Yokohama
- Assignee: Transphorm Japan, Inc.
- Current Assignee: Transphorm Japan, Inc.
- Current Assignee Address: JP Yokohama
- Agency: Fish & Richardson P.C.
- Priority: JP2010-242457 20101028
- Main IPC: G05F1/00
- IPC: G05F1/00 ; H02M3/158 ; H02M1/08

Abstract:
A first transistor coupled between a power supply line and an inductor, a second transistor coupled between a source of the first transistor and a reference voltage line, and a third transistor coupled between the source of the first transistor and a load are included, and efficiency deterioration caused by a dead time is improved by keeping a current flow through a current path of an inductor, a load, and the third transistor during the dead time by supplying a voltage which is less than a threshold voltage and approximately the threshold voltage to a gate of the third transistor as a gate voltage.
Public/Granted literature
- US20120105146A1 REGULATOR CIRCUIT Public/Granted day:2012-05-03
Information query
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