Invention Grant
US08845854B2 Laser, plasma etch, and backside grind process for wafer dicing
有权
用于晶片切割的激光，等离子体蚀刻和背面研磨工艺
- Patent Title: Laser, plasma etch, and backside grind process for wafer dicing
- Patent Title (中): 用于晶片切割的激光，等离子体蚀刻和背面研磨工艺
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Application No.: US13938537Application Date: 2013-07-10
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Publication No.: US08845854B2Publication Date: 2014-09-30
- Inventor: Wei-Sheng Lei , Brad Eaton , Madhava Rao Yalamanchili , Saravjeet Singh , Ajay Kumar
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely Sokoloff Taylor & Zafman LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; C23F1/00 ; C23C16/00 ; H01L21/78
Abstract:
Front side laser scribing and plasma etch are performed followed by back side grind to singulate integrated circuit chips (ICs). A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to advance a front of an etched trench partially through the semiconductor wafer thickness. The front side mask is removed, a backside grind tape applied to the front side, and a back side grind performed to reach the etched trench, thereby singulating the ICs.
Public/Granted literature
- US20140017880A1 LASER, PLASMA ETCH, AND BACKSIDE GRIND PROCESS FOR WAFER DICING Public/Granted day:2014-01-16
Information query
IPC分类:
