Invention Grant
US08913451B2 Memory device and test method thereof 有权
存储器件及其测试方法

Memory device and test method thereof
Abstract:
A method for testing a memory device includes entering a test mode in which multiple memory banks operate in a same manner, allowing a row corresponding to a row address in the multiple memory banks to be activated, latching a bank address and the row address corresponding to the multiple memory banks, writing same data in a column selected by a column address in the multiple memory banks, reading the data written in the writing of the data from the multiple memory banks, checking whether the data read from the multiple memory banks in the reading of the data are equal to each other, and programming the row address to locations designated by the bank address latched in the latching in a nonvolatile memory when the data read from the multiple memory banks are different from each other.
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