Invention Grant
US08929166B2 Fault masking method for non-volatile memories 有权
用于非易失性存储器的故障屏蔽方法

Fault masking method for non-volatile memories
Abstract:
A fault masking method is applied to a non-volatile memory array which includes a faulty cell and electrically connected to an address register providing a first address. The faulty cell can only output a fixed value. The content of the first address is not equal to the fixed value. The method includes: providing a complementer electrically connected between the address register and the faulty cell; providing a control word; writing the first address and the control word into the complementer; performing a complement operation on the first address and the control word by the complementer to obtain a second address, and storing the content of the second address into the faulty cell, wherein the content of the second address is equal to the fixed value. The method can reduce or eliminate the usage of redundancy in non-volatile memories, so as to reduce the manufacturing costs and improve the fabrication yield.
Public/Granted literature
Information query
Patent Agency Ranking
0/0