Invention Grant
- Patent Title: Fault masking method for non-volatile memories
- Patent Title (中): 用于非易失性存储器的故障屏蔽方法
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Application No.: US13940353Application Date: 2013-07-12
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Publication No.: US08929166B2Publication Date: 2015-01-06
- Inventor: Shyue-Kung Lu , Tsu-Lin Li
- Applicant: National Taiwan University of Science and Technology
- Applicant Address: TW Taipei
- Assignee: National Taiwan University of Science and Technology
- Current Assignee: National Taiwan University of Science and Technology
- Current Assignee Address: TW Taipei
- Agency: Bacon & Thomas, PLLC
- Priority: TW102101601A 20130116
- Main IPC: G11C29/18
- IPC: G11C29/18 ; G11C29/00

Abstract:
A fault masking method is applied to a non-volatile memory array which includes a faulty cell and electrically connected to an address register providing a first address. The faulty cell can only output a fixed value. The content of the first address is not equal to the fixed value. The method includes: providing a complementer electrically connected between the address register and the faulty cell; providing a control word; writing the first address and the control word into the complementer; performing a complement operation on the first address and the control word by the complementer to obtain a second address, and storing the content of the second address into the faulty cell, wherein the content of the second address is equal to the fixed value. The method can reduce or eliminate the usage of redundancy in non-volatile memories, so as to reduce the manufacturing costs and improve the fabrication yield.
Public/Granted literature
- US20140198592A1 Fault Masking Method for Non-Volatile Memories Public/Granted day:2014-07-17
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