Invention Grant
US09054097B2 Compliant printed circuit area array semiconductor device package
有权
符合印刷电路面积阵列的半导体器件封装
- Patent Title: Compliant printed circuit area array semiconductor device package
- Patent Title (中): 符合印刷电路面积阵列的半导体器件封装
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Application No.: US13266573Application Date: 2010-05-27
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Publication No.: US09054097B2Publication Date: 2015-06-09
- Inventor: James Rathburn
- Applicant: James Rathburn
- Applicant Address: US MN Maple Grove
- Assignee: HSIO TECHNOLOGIES, LLC
- Current Assignee: HSIO TECHNOLOGIES, LLC
- Current Assignee Address: US MN Maple Grove
- Agency: Stoel Rives LLP
- International Application: PCT/US2010/036363 WO 20100527
- International Announcement: WO2010/141311 WO 20101209
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/498 ; H01L21/48 ; H01L23/552 ; H01L23/66 ; H01L23/00

Abstract:
An integrated circuit (IC) package for an IC device, and a method of making the same. The IC package includes an interconnect assembly with at least one printed compliant layer, a plurality of first contact members located along a first major surface, a plurality of second contact members located along a second major surface, and a plurality of printed conductive traces electrically coupling a plurality of the first and second contact members. The compliant layer is positioned to bias at least the first contact members against terminals on the IC device. Packaging substantially surrounds the IC device and the interconnect assembly. The second contact members are accessible from outside the packaging.
Public/Granted literature
- US20120061846A1 COMPLIANT PRINTED CIRCUIT AREA ARRAY SEMICONDUCTOR DEVICE PACKAGE Public/Granted day:2012-03-15
Information query
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