Invention Grant
US09119313B2 Package substrate with high density interconnect design to capture conductive features on embedded die 有权
封装衬底采用高密度互连设计,以捕获嵌入式裸片上的导电特性

Package substrate with high density interconnect design to capture conductive features on embedded die
Abstract:
Embodiments of the present disclosure are directed towards techniques and configurations for interconnect structures embedded in a package assembly including a bridge. In one embodiment, a package assembly may include a package substrate, a bridge embedded in the package substrate and including a bridge substrate, and an interconnect structure including a via extending through the package substrate into a surface of the bridge substrate and configured to interface with a conductive feature disposed on or beneath the surface of the bridge substrate. The interconnect structure may be configured to route electrical signals between the conductive feature and a die mounted on the package substrate. Other embodiments may be described and/or claimed.
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