Invention Grant
- Patent Title: Link equalization mechanism
- Patent Title (中): 链路均衡机制
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Application No.: US14495768Application Date: 2014-09-24
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Publication No.: US09124455B1Publication Date: 2015-09-01
- Inventor: Su Wei Lim , Ronald W. Swartz , Yueming Jiang , Hooi Kar Loo , Athourina Gevergiz , Bruce A. Tennant , Yick Yaw Ho , Poh Thiam Teoh , Jennifer Chin , Hui Shi
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: International IP Law Group, P.L.L.C.
- Main IPC: H03H7/30
- IPC: H03H7/30 ; H04L25/03

Abstract:
Techniques for embedded high speed serial interface methods are described herein. The techniques provide an apparatus for link equalization including an equalization control module to determine at least a first coefficient setting and a second coefficient setting at a remote transmitter based on an algorithm. The apparatus also includes a receiver margining module to determine a first margin value to be associated with the first coefficient setting and a second margin value to be associated with the second coefficient setting. The receiver margining module is to further determine if at least the first margin value is higher than the second margin value.
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