Invention Grant
US09128643B2 Method and apparatus performing clock extraction utilizing edge analysis upon a training sequence equalization pattern 有权
方法和装置利用训练序列均衡模式的边缘分析来执行时钟提取

  • Patent Title: Method and apparatus performing clock extraction utilizing edge analysis upon a training sequence equalization pattern
  • Patent Title (中): 方法和装置利用训练序列均衡模式的边缘分析来执行时钟提取
  • Application No.: US13896343
    Application Date: 2013-05-17
  • Publication No.: US09128643B2
    Publication Date: 2015-09-08
  • Inventor: Ying-Chen Lin
  • Applicant: Silicon Motion Inc.
  • Applicant Address: TW Jhubei, Hsinchu County
  • Assignee: Silicon Motion Inc.
  • Current Assignee: Silicon Motion Inc.
  • Current Assignee Address: TW Jhubei, Hsinchu County
  • Agent Winston Hsu; Scott Margo
  • Priority: TW102114881A 20130425
  • Main IPC: G06F1/12
  • IPC: G06F1/12 H04L7/033 H04L7/04
Method and apparatus performing clock extraction utilizing edge analysis upon a training sequence equalization pattern
Abstract:
A method and apparatus for performing clock extraction are provided. The method includes: performing edge analysis on a Training Sequence Equalization (TSEQ) pattern carried by a set of received signals that are received from a Universal Serial Bus (USB) port of an electronic device, to dynamically generate a plurality of analysis results; and performing frequency calibration on a frequency of an output clock of a Numerically Controlled Oscillator (NCO) according to a frequency that different types of analysis results within the plurality of analysis results alternatively occur, to utilize the output clock as a reference clock after completing the frequency calibration. More particularly, the method further includes: generating a set of de-multiplexed signals respectively corresponding to a plurality of bits, to perform the edge analysis by comparing respective voltage levels of de-multiplexed signals corresponding to every two adjacent bits of the plurality of bits within the set of de-multiplexed signals.
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