Invention Grant
US09256278B2 Devices and methods for multi-core memory 有权
多核存储器的设备和方法

Devices and methods for multi-core memory
Abstract:
A power management device is adopted in a memory device which includes a first memory unit and a second memory unit, including a first voltage regulator, a second voltage regulator, and a controller. The first voltage regulator receives a supply voltage from an external supply source and provides a first internal voltage to the first memory unit. The second voltage regulator receives the supply voltage from the external supply source and provides a second internal voltage to the second memory unit. The controller independently enables or disables the first voltage regulator and the second voltage regulator according to a control signal.
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