Invention Grant
- Patent Title: Dicing processes for thin wafers with bumps on wafer backside
- Patent Title (中): 在晶片背面具有凸起的薄晶片的切割工艺
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Application No.: US14226038Application Date: 2014-03-26
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Publication No.: US09275902B2Publication Date: 2016-03-01
- Inventor: Wei-Sheng Lei , James S. Papanu , Aparna Iyer , Brad Eaton , Ajay Kumar
- Applicant: Wei-Sheng Lei , James S. Papanu , Aparna Iyer , Brad Eaton , Ajay Kumar
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely Sokoloff Taylor Zafman LLP
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L23/544

Abstract:
Approaches for front side laser scribe plus backside bump formation and laser scribe and plasma etch dicing process are described. For example, a method of dicing a semiconductor wafer having integrated circuits on a front side thereof involves forming first scribe lines on the front side, between the integrated circuits, with a first laser scribing process. The method also involves forming arrays of metal bumps on a backside of the semiconductor wafer, each array corresponding to one of the integrated circuits. The method also involves forming second scribe lines on the backside, between the arrays of metal bumps, with a second laser scribing process, wherein the second scribe lines are aligned with the first scribe lines. The method also involves plasma etching the semiconductor wafer through the second scribe lines to singulate the integrated circuits.
Public/Granted literature
- US20150279739A1 DICING PROCESSES FOR THIN WAFERS WITH BUMPS ON WAFER BACKSIDE Public/Granted day:2015-10-01
Information query
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