Invention Grant
US09304940B2 Processors, methods, and systems to relax synchronization of accesses to shared memory 有权
处理器,方法和系统,以缓解对共享内存访问的同步

Processors, methods, and systems to relax synchronization of accesses to shared memory
Abstract:
A processor of an aspect includes a plurality of logical processors. A first logical processor of the plurality is to execute software that includes a memory access synchronization instruction that is to synchronize accesses to a memory. The processor also includes memory access synchronization relaxation logic that is to prevent the memory access synchronization instruction from synchronizing accesses to the memory when the processor is in a relaxed memory access synchronization mode.
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