Invention Grant
US09337859B2 Method and system for asynchronous successive approximation analog-to-digital convertor (ADC) architecture
有权
用于异步逐次逼近模数转换器(ADC)架构的方法和系统
- Patent Title: Method and system for asynchronous successive approximation analog-to-digital convertor (ADC) architecture
- Patent Title (中): 用于异步逐次逼近模数转换器(ADC)架构的方法和系统
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Application No.: US14812327Application Date: 2015-07-29
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Publication No.: US09337859B2Publication Date: 2016-05-10
- Inventor: Xuefeng Chen , Kok Lim Chan , Eric Fogleman , Sheng Ye
- Applicant: MaxLinear, Inc.
- Applicant Address: US CA Carlsbad
- Assignee: MAXLINEAR, INC.
- Current Assignee: MAXLINEAR, INC.
- Current Assignee Address: US CA Carlsbad
- Agency: McAndrews, Held & Malloy, Ltd.
- Main IPC: H03M1/10
- IPC: H03M1/10 ; H03M1/38 ; H03M1/06 ; H03M1/12 ; H03M1/46

Abstract:
Methods and systems are provided for controlling signal processing outputs. In signal processing circuitry, searching through a plurality of quantization levels for a quantization level that matches an analog input, and when the search fails within a particular amount of time, adjusting at least a portion of an output of the signal processing circuitry. The adjusting comprises setting the at least portion of the output to a predefined value. Setting the output, or portions thereof, may comprise selecting between output of a normal processing path and output of a code generation path configured for handling search failures. Timing information may be generated for use in controlling generating of the output of the signal processing circuitry. The timing information may be used in measuring per-cycle operation time during the search through the plurality of quantization levels.
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