Invention Grant
- Patent Title: TSV structure having insulating layers with embedded voids
- Patent Title (中): TSV结构具有带嵌入空隙的绝缘层
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Application No.: US14618790Application Date: 2015-02-10
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Publication No.: US09379043B1Publication Date: 2016-06-28
- Inventor: Ming-Yi Wang , Chao-Shun Chiu , Yen-Chu Chen
- Applicant: POWERTECH TECHNOLOGY INC.
- Applicant Address: TW Hsinchu
- Assignee: POWERTECH TECHNOLOGY INC.
- Current Assignee: POWERTECH TECHNOLOGY INC.
- Current Assignee Address: TW Hsinchu
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L29/49 ; H01L23/48 ; H01L23/00 ; H01L23/532 ; H01L23/31 ; H01L21/764 ; H01L21/768

Abstract:
Disclosed is a TSV structure having insulating layers with embedded voids, including a chip layer, a dielectric liner and a conductive filler. There is at least a via reentrant from one surface of the semiconductor body of the chip layer. A plurality of air-gap cavities are formed on the sidewall of the via where the cavities have a depth-to-width ratio not less than one. The dielectric liner covers the sidewall of the via without filling into the air-gap cavities. The conductive filler is disposed in the via without filling into the air-gap cavities due to the isolation of the dielectric liner so as to form an air insulating layer with a plurality of enclosed voids embedded between the semiconductor body and the dielectric liner. Accordingly, RC Delay of the TSV structure can be improved.
Information query
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