Invention Grant
- Patent Title: Semiconductor wafer and insulated gate field effect transistor
- Patent Title (中): 半导体晶圆和绝缘栅场效应晶体管
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Application No.: US13777770Application Date: 2013-02-26
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Publication No.: US09379226B2Publication Date: 2016-06-28
- Inventor: Noboru Fukuhara
- Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
- Applicant Address: JP Tokyo
- Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
- Current Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2010-195175 20100831
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L29/201 ; H01L29/205 ; H01L29/66 ; H01L29/36 ; H01L29/10 ; H01L29/51

Abstract:
Provided is a technique capable of realizing an insulated gate (MIS-type) P-HEMT structure with good transistor characteristics such as an improved carrier mobility of a channel layer and a reduced influence from interface states. A semiconductor wafer includes a base wafer, a first crystalline layer, and an insulating layer. The base wafer, the first crystalline layer, and the insulating layer are stacked in the order of the base wafer, the first crystalline layer, and the insulating layer. The first crystalline layer is made of InxGa1-xAs (0.35≦x≦0.43) that can pseudo-lattice-match with GaAs or AlGaAs. The first crystalline layer is usable as a channel layer of a field effect transistor, and the insulating layer is usable as a gate insulating layer of the field effect transistor.
Public/Granted literature
- US20130168735A1 SEMICONDUCTOR WAFER AND INSULATED GATE FIELD EFFECT TRANSISTOR Public/Granted day:2013-07-04
Information query
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