Invention Grant
US09384806B2 Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
有权
补偿存储器访问信号的电路和技术，用于在多层存储器中的参数变化
- Patent Title: Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
- Patent Title (中): 补偿存储器访问信号的电路和技术，用于在多层存储器中的参数变化
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Application No.: US14827292Application Date: 2015-08-15
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Publication No.: US09384806B2Publication Date: 2016-07-05
- Inventor: Christophe Chevallier , Seow Fong Lim , Chang Hua Siau
- Applicant: Unity Semiconductor Corporation
- Applicant Address: US CA Sunnyvale
- Assignee: Unity Semiconductor Corporation
- Current Assignee: Unity Semiconductor Corporation
- Current Assignee Address: US CA Sunnyvale
- Agency: Lowenstein Sandler LLP
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C7/22 ; G11C5/02 ; G11C11/21 ; G11C13/00 ; G11C8/10 ; G11C8/12 ; B82Y30/00 ; G11C7/04
Abstract:
A memory device includes a plurality of memory layers and a selecting circuit configured to select a delta value corresponding to a parameter of at least one of the plurality of memory layers having fabricated thereon at least one memory cell accessed during an operation. The memory device further includes an adjusting circuit configured to adjust an access signal based at least in part on the delta value, the access signal being configured to access the at least one memory cell during the operation.
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