Invention Grant
US09385218B1 Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy
有权
用于形成具有改善的源极/漏极外延的介电隔离FinFET的方法和结构
- Patent Title: Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy
- Patent Title (中): 用于形成具有改善的源极/漏极外延的介电隔离FinFET的方法和结构
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Application No.: US14694562Application Date: 2015-04-23
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Publication No.: US09385218B1Publication Date: 2016-07-05
- Inventor: Kangguo Cheng , Pouya Hashemi , Alexander Reznicek
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Louis J. Percello, Esq.
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/66 ; H01L29/78 ; H01L29/10

Abstract:
A semiconductor structure is provided that includes a fin structure of, from bottom to top, a semiconductor punch through stop (PTS) doping fin portion, a dielectric material fin portion, and a topmost semiconductor fin portion that is present on a wider semiconductor fin base. A functional gate structure straddles the semiconductor fin structure. Portions of the wider semiconductor fin base that are not located directly beneath the fin structure of the present application and that are not covered by the functional gate structure can be used as an area for epitaxial growth of source/drain structures. The wide semiconductor fin base improves source/drain epitaxy for better dopant incorporation and strain enhancement.
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