Invention Grant
- Patent Title: Circuit substrate and method of forming circuit pattern
- Patent Title (中): 电路基板和形成电路图案的方法
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Application No.: US14363184Application Date: 2012-11-06
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Publication No.: US09386707B2Publication Date: 2016-07-05
- Inventor: Takashi Iwade , Shinya Izumida , Kazuyuki Shishino , Kiyohito Yamamoto , Shigeru Tohno
- Applicant: TORAY ENGINEERING CO., LTD.
- Applicant Address: JP Tokyo
- Assignee: TORAY ELECTRONICS CO., LTD.
- Current Assignee: TORAY ELECTRONICS CO., LTD.
- Current Assignee Address: JP Tokyo
- Agency: Troutman Sanders LLP
- Priority: JP2011-269873 20111209
- International Application: PCT/JP2012/078669 WO 20121106
- International Announcement: WO2013/084640 WO 20130613
- Main IPC: H05K3/12
- IPC: H05K3/12 ; H05K1/02

Abstract:
With a nozzle being moved in one direction to a substrate unit, conductive ink is discharged out of a slit of the nozzle in a belt-like manner to the substrate unit. The conductive ink is discharged in a belt-like manner to the substrate unit on which a liquid-repellent region having a liquid repellency to the conductive ink and a lyophilic region having a lyophilic property to the conductive ink and having the same form as a desired circuit pattern are formed. Thereby, the conductive ink is applied to the lyophilic region, while the conductive ink is repelled at the remaining liquid-repellent region and flows into the lyophilic region.
Public/Granted literature
- US20140353016A1 CIRCUIT SUBSTRATE AND METHOD OF FORMING CIRCUIT PATTERN Public/Granted day:2014-12-04
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