Invention Grant
- Patent Title: 3D integrated circuit package with window interposer
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Application No.: US14813014Application Date: 2015-07-29
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Publication No.: US09391013B2Publication Date: 2016-07-12
- Inventor: Debendra Mallik , Ram S. Viswanath , Sriram Srinivasan , Mark T. Bohr , Andrew W. Yeoh , Sairam Agraharam
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/498 ; H01L23/13 ; H01L25/065

Abstract:
3D integrated circuit packages with window interposers and methods to form such semiconductor packages are described. For example, a semiconductor package includes a substrate. A top semiconductor die is disposed above the substrate. An interposer having a window is disposed between and interconnected to the substrate and the top semiconductor die. A bottom semiconductor die is disposed in the window of the interposer and interconnected to the top semiconductor die. In another example, a semiconductor package includes a substrate. A top semiconductor die is disposed above the substrate. An interposer is disposed between and interconnected to the substrate and the top semiconductor die. A bottom semiconductor die is disposed in a same plane as the interposer and interconnected to the top semiconductor die.
Public/Granted literature
- US20150332994A1 3D INTEGRATED CIRCUIT PACKAGE WITH WINDOW INTERPOSER Public/Granted day:2015-11-19
Information query
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