Invention Grant
- Patent Title: Apparatuses including stair-step structures and methods of forming the same
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Application No.: US14679488Application Date: 2015-04-06
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Publication No.: US09466531B2Publication Date: 2016-10-11
- Inventor: Eric H. Freeman , Michael A. Smith
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L21/768 ; H01L27/115 ; H01L23/528 ; H01L21/311 ; H01L21/3213

Abstract:
Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets, forming a first number of contact regions, forming a second mask over a first region of the sets, and removing material from of the sets in a second, exposed region laterally adjacent the first region to form a second number of contact regions. Another method includes forming first and second contact regions on portions of sets of conductive materials and insulating materials, each of the second contact regions more proximal to an underlying substrate than each of the first contact regions. Apparatuses such as memory devices including laterally adjacent first and second regions each of which including contact regions of a different portion of a plurality of conductive materials and related methods of forming such devices are also disclosed.
Public/Granted literature
- US20150214107A1 APPARATUSES INCLUDING STAIR-STEP STRUCTURES AND METHODS OF FORMING THE SAME Public/Granted day:2015-07-30
Information query
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