Invention Grant
US09502303B2 Method for manufacturing semiconductor device with a barrier layer having overhung portions
有权
具有阻挡层的具有悬垂部分的半导体器件的制造方法
- Patent Title: Method for manufacturing semiconductor device with a barrier layer having overhung portions
- Patent Title (中): 具有阻挡层的具有悬垂部分的半导体器件的制造方法
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Application No.: US14682265Application Date: 2015-04-09
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Publication No.: US09502303B2Publication Date: 2016-11-22
- Inventor: Kun-Ju Li , Kuo-Chin Hung , Po-Cheng Huang , Yu-Ting Li , Wu-Sian Sie , Chun-Tsen Lu , Wen-Chin Lin , Fu-Shou Tsai
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsinchu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, PC
- Agent Justin King
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/8234 ; H01L21/3213 ; H01L21/285

Abstract:
A method for manufacturing a semiconductor device is provided. A substrate with an insulation formed thereon is provided, wherein the insulation has plural trenches, and the adjacent trenches are spaced apart from each other. A barrier layer is formed on an upper surface of the insulation and in sidewalls of the trenches, and the barrier layer comprises overhung portions corresponding to the trenches. A seed layer is formed on the barrier layer. Then, an upper portion of the seed layer formed on an upper surface of the barrier layer is removed. An upper portion of the barrier layer is removed for exposing the upper surface of the insulation. Afterwards, the conductors are deposited along the seed layer for filling up the trenches, wherein the top surfaces of the conductors are substantially aligned with the upper surface of the insulation.
Public/Granted literature
- US20160300765A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2016-10-13
Information query
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