Invention Grant
- Patent Title: Voltage doubler and voltage doubling method for use in PWM mode
- Patent Title (中): 用于PWM模式的倍压器和倍压方法
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Application No.: US14864975Application Date: 2015-09-25
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Publication No.: US09531260B2Publication Date: 2016-12-27
- Inventor: Horst Knoedgen , Gary Hague
- Applicant: Dialog Semiconductor (UK) Limited
- Applicant Address: GB Reading
- Assignee: Dialog Semiconductor (UK) Limited
- Current Assignee: Dialog Semiconductor (UK) Limited
- Current Assignee Address: GB Reading
- Agency: Saile Ackerman LLC
- Agent Stephen B. Ackerman
- Priority: DE102014226716 20141219
- Main IPC: H02M3/18
- IPC: H02M3/18 ; H02M3/07 ; H02P7/00 ; H02P1/18 ; H02M1/08 ; H03K7/08

Abstract:
An apparatus and a method for generating a pulse width modulated, PWM, voltage doubler signal is presented The apparatus comprises a voltage source, a capacitor, an output node, a switchable circuit assembly for connecting the voltage source, the capacitor and the output node, and a controller for the switchable circuit assembly which is adapted to be switchable between a first circuit configuration in which the capacitor is connected in parallel to the voltage source so as to be chargeable by the voltage source, and a second circuit configuration in which the capacitor is connected in series between the voltage source and the output node, and wherein the control means is adapted to control the switchable circuit assembly to switch to the first circuit configuration in the first period, and to switch to the second circuit configuration in the second period.
Public/Granted literature
- US20160181914A1 Voltage Doubler and Voltage Doubling Method for Use in PWM Mode Public/Granted day:2016-06-23
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