Invention Grant
- Patent Title: Bonding pad arrangment design for multi-die semiconductor package structure
- Patent Title (中): 多芯片半导体封装结构的焊盘排列设计
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Application No.: US14809482Application Date: 2015-07-27
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Publication No.: US09564395B2Publication Date: 2017-02-07
- Inventor: Hsing-Chih Liu , Chia-Hao Yang , Ying-Chih Chen
- Applicant: MediaTek Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsin-Chu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/522 ; H01L23/538 ; H01L23/528 ; H01L23/50 ; H01L23/495 ; H01L23/00 ; H01L25/065

Abstract:
A semiconductor package structure includes a base. A first die is mounted on the base. The first die comprises a plurality of first pads with a first pad area arranged in a first tier. A plurality of second pads with a second pad area is arranged in a second tier. A second die is mounted on the base. The second die includes a plurality of third pads arranged in a third tier. A first bonding wire has two terminals respectively coupled to one of the first pads and one of the third pads. A second bonding wire has two terminals respectively coupled to one of the third pads and one of the second pads.
Public/Granted literature
- US20150333039A1 BONDING PAD ARRANGMENT DESIGN FOR MULTI-DIE SEMICONDUCTOR PACKAGE STRUCTURE Public/Granted day:2015-11-19
Information query
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