Invention Grant
US09570466B2 Structure and method to form passive devices in ETSOI process flow
有权
在ETSOI流程中形成无源器件的结构和方法
- Patent Title: Structure and method to form passive devices in ETSOI process flow
- Patent Title (中): 在ETSOI流程中形成无源器件的结构和方法
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Application No.: US14159027Application Date: 2014-01-20
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Publication No.: US09570466B2Publication Date: 2017-02-14
- Inventor: Ming Cai , Dechao Guo , Chun-Chen Yeh
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Roberts Mlotkowski Safran Cole & Calderon P.C.
- Agent Michael LeStrange; Andrew M. Calderon
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L29/06 ; H01L21/84 ; H01L29/78 ; H01L27/13
Abstract:
Techniques for fabricating passive devices in an extremely-thin silicon-on-insulator (ETSOI) wafer are provided. In one aspect, a method for fabricating one or more passive devices in an ETSOI wafer is provided. The method includes the following steps. The ETSOI wafer having a substrate and an ETSOI layer separated from the substrate by a buried oxide (BOX) is provided. The ETSOI layer is coated with a protective layer. At least one trench is formed that extends through the protective layer, the ETSOI layer and the BOX, and wherein a portion of the substrate is exposed within the trench. Spacers are formed lining sidewalls of the trench. Epitaxial silicon templated from the substrate is grown in the trench. The protective layer is removed from the ETSOI layer. The passive devices are formed in the epitaxial silicon.
Public/Granted literature
- US20140131802A1 Structure and Method to Form Passive Devices in ETSOI Process Flow Public/Granted day:2014-05-15
Information query
IPC分类:
