Invention Grant
US09583217B2 Decoding method, memory storage device and memory control circuit unit 有权
解码方法,存储器存储装置和存储器控制电路单元

Decoding method, memory storage device and memory control circuit unit
Abstract:
A decoding method, a memory storage device and a memory control circuit unit are provided, the decoding method includes: reading a plurality of memory cells according to hard decision voltage to obtain hard bit; performing a parity check procedure for the hard bit to obtain a plurality of syndromes; determining whether the hard bit has error according to the syndromes; if the hard bit has the error, updating the hard bit according to channel information of the hard bit and syndrome weight information corresponding to the hard bit.
Information query
Patent Agency Ranking
0/0