Invention Grant
US09583217B2 Decoding method, memory storage device and memory control circuit unit
有权
解码方法,存储器存储装置和存储器控制电路单元
- Patent Title: Decoding method, memory storage device and memory control circuit unit
- Patent Title (中): 解码方法,存储器存储装置和存储器控制电路单元
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Application No.: US14296383Application Date: 2014-06-04
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Publication No.: US09583217B2Publication Date: 2017-02-28
- Inventor: Wei Lin , Shao-Wei Yen , Yu-Hsiang Lin , Kuo-Hsin Lai
- Applicant: PHISON ELECTRONICS CORP.
- Applicant Address: TW Miaoli
- Assignee: PHISON ELECTRONICS CORP.
- Current Assignee: PHISON ELECTRONICS CORP.
- Current Assignee Address: TW Miaoli
- Agency: Jianq Chyun IP Office
- Priority: TW103113690A 20140415
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/52 ; H03M13/37 ; G06F11/10 ; G11C29/04

Abstract:
A decoding method, a memory storage device and a memory control circuit unit are provided, the decoding method includes: reading a plurality of memory cells according to hard decision voltage to obtain hard bit; performing a parity check procedure for the hard bit to obtain a plurality of syndromes; determining whether the hard bit has error according to the syndromes; if the hard bit has the error, updating the hard bit according to channel information of the hard bit and syndrome weight information corresponding to the hard bit.
Public/Granted literature
- US20150293813A1 DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT Public/Granted day:2015-10-15
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