Invention Grant
- Patent Title: Apparatus and methods for optimization of integrated circuits
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Application No.: US14599514Application Date: 2015-01-18
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Publication No.: US09600622B2Publication Date: 2017-03-21
- Inventor: Ryan Fung
- Applicant: Altera Corporation
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A system for computer-aided design (CAD) of an integrated circuit (IC) uses a computer. The computer is configured to optimize placement, routing, and/or region configuration of the integrated circuit (IC) by maximizing a number of low-power regions in the integrated circuit (IC).
Public/Granted literature
- US20150135154A1 Apparatus and Methods for Optimization of Integrated Circuits Public/Granted day:2015-05-14
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