Invention Grant
- Patent Title: Memory circuit provided with bistable circuit and non-volatile element
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Application No.: US14543487Application Date: 2014-11-17
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Publication No.: US09601198B2Publication Date: 2017-03-21
- Inventor: Yusuke Shuto , Shuichiro Yamamoto , Satoshi Sugahara
- Applicant: Japan Science and Technology Agency
- Applicant Address: JP Saitama
- Assignee: JAPAN SCIENCE AND TECHNOLOGY AGENCY
- Current Assignee: JAPAN SCIENCE AND TECHNOLOGY AGENCY
- Current Assignee Address: JP Saitama
- Agency: Michael Best & Friedrich LLP
- Priority: JP2012-114989 20120518
- Main IPC: G11C14/00
- IPC: G11C14/00

Abstract:
A memory circuit includes: a bistable circuit (30) that stores data; nonvolatile elements (MTJ1, MTJ2) that store data written in the bistable circuit in a nonvolatile manner, and restore data stored in a nonvolatile manner into the bistable circuit; and a control unit that stores data written in the bistable circuit in a nonvolatile manner and cuts off a power supply to the bistable circuit when the period not to read data from or write data into the bistable circuit is longer than a predetermined time period, and does not store data written in the bistable circuit in a nonvolatile manner and makes the supply voltage for the bistable circuit lower than a voltage during the period to read data from or write data into the bistable circuit when the period not to read or write data is shorter than the predetermined time period.
Public/Granted literature
- US20150070974A1 MEMORY CIRCUIT PROVIDED WITH BISTABLE CIRCUIT AND NON-VOLATILE ELEMENT Public/Granted day:2015-03-12
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