Invention Grant
- Patent Title: Area array semiconductor device package interconnect structure with optional package-to-package or flexible circuit to package connection
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Application No.: US13410943Application Date: 2012-03-02
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Publication No.: US09613841B2Publication Date: 2017-04-04
- Inventor: James Rathburn
- Applicant: James Rathburn
- Applicant Address: US MN Maple Grove
- Assignee: HSIO Technologies, LLC
- Current Assignee: HSIO Technologies, LLC
- Current Assignee Address: US MN Maple Grove
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/60 ; H01L21/683 ; H01L23/498 ; H01L23/60 ; H01L23/00 ; H05K3/34

Abstract:
An area array integrated circuit (IC) package for an IC device. The IC package includes a first substrate with conductive traces electrically coupled to the IC device. An interconnect assembly having a first surface is mechanically coupled to the first substrate. The interconnect assembly includes a plurality of contact members electrically coupled to the conductive traces on the first substrate. A second substrate is mechanically coupled to a second surface of the interconnect assembly so that the first substrate, the interconnect assembly, and the second substrate substantially surround the IC device. The second substrate includes conductive traces that are electrically coupled to the contact members in the interconnect assembly.
Public/Granted literature
Information query
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