Invention Grant
- Patent Title: III-N devices in Si trenches
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Application No.: US14162717Application Date: 2014-01-23
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Publication No.: US09640422B2Publication Date: 2017-05-02
- Inventor: Sansaptak Dasgupta , Han Wui Then , Sanaz K. Gardner , Seung Hoon Sung , Marko Radosavljevic , Benjamin Chu-Kung , Sherry R. Taft , Ravi Pillarisetty , Robert S. Chau
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/762 ; H01L21/02
Abstract:
A trench comprising a portion of a substrate is formed. A nucleation layer is deposited on the portion of the substrate within the trench. A III-N material layer is deposited on the nucleation layer. The III-N material layer is laterally grown over the trench. A device layer is deposited on the laterally grown III-N material layer. A low defect density region is obtained on the laterally grown material and is used for electronic device fabrication of III-N materials on Si substrates.
Public/Granted literature
- US20150206796A1 III-N DEVICES IN SI TRENCHES Public/Granted day:2015-07-23
Information query
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