Invention Grant
- Patent Title: Substrate structure and manufacturing method thereof
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Application No.: US15052885Application Date: 2016-02-25
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Publication No.: US09648760B2Publication Date: 2017-05-09
- Inventor: Chao-Min Wang
- Applicant: Subtron Technology Co., Ltd.
- Applicant Address: TW Hsinchu County
- Assignee: Subtron Technology Co., Ltd.
- Current Assignee: Subtron Technology Co., Ltd.
- Current Assignee Address: TW Hsinchu County
- Agency: Jianq Chyun IP Office
- Priority: TW103115196A 20140428
- Main IPC: H05K3/06
- IPC: H05K3/06 ; H05K1/09 ; H05K3/46 ; H05K1/02 ; H05K3/14 ; H05K3/00 ; H05K3/04

Abstract:
A substrate structure includes a dielectric layer, a metal foil, a patterned metal layer, a first patterned solder-resist layer and a second patterned solder-resist layer. The dielectric layer includes a first surface and a second surface, and the first surface has a plurality of recesses. The metal foil is disposed on the second surface. The patterned metal layer is disposed on the first surface, the patterned metal layer has a plurality of openings, and the openings are respectively corresponding to and expose the recesses. The first patterned solder-resist layer is filled in each of the recesses and corresponding to each of the openings. A top surface of the first patterned solder-resist layer is substantially coplanar with a top surface of the patterned metal layer. The second patterned solder-resist layer is disposed on the first patterned solder-resist layer and in the openings, and covers a portion of the patterned metal layer.
Public/Granted literature
- US20160174390A1 SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2016-06-16
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