Invention Grant
- Patent Title: High performance interconnect physical layer
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Application No.: US14538919Application Date: 2014-11-12
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Publication No.: US09697158B2Publication Date: 2017-07-04
- Inventor: Venkatraman Iyer , Darren S. Jue , Jeff Willey , Robert G. Blankenship
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Patent Capital Group
- Main IPC: G06F1/12
- IPC: G06F1/12 ; G06F13/40 ; G06F13/42 ; H04L12/933 ; H04L12/741

Abstract:
A reset of a synchronization counter is synchronized to an external deterministic signal. Entry into the link transmitting state is further synchronized with the deterministic signal. A target latency is identified for a serial data link. A data sequence is received synchronized with a synchronization counter associated with the data link. Target latency can be maintained using the data sequence.
Public/Granted literature
- US20150169486A1 HIGH PERFORMANCE INTERCONNECT PHYSICAL LAYER Public/Granted day:2015-06-18
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