Invention Grant
- Patent Title: Semiconductor structure including dummy structure and semiconductor pattern structure including dummy structure
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Application No.: US14583575Application Date: 2014-12-26
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Publication No.: US09748333B2Publication Date: 2017-08-29
- Inventor: Shin-Chi Chen , Chih-Yueh Li , Pei-Ching Yeh , Chih-Jen Lin
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Priority: TW103140664A 20141124
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/764 ; H01L29/06 ; H01L29/78 ; H01L21/28
Abstract:
A semiconductor pattern structure includes a substrate, an input/output (I/O) region defined on the substrate, a core region defined on the substrate, a dummy region defined on the substrate, and a gate electrode formed on the substrate. The dummy region is formed between the I/O region and the core region. The gate electrode crosses the I/O region and covers a portion of the dummy region.
Public/Granted literature
- US20160148878A1 SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR PATTERN STRUCTURE Public/Granted day:2016-05-26
Information query
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