Invention Grant
- Patent Title: Concurrently reading first and second pages of memory cells having different page addresses
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Application No.: US15288010Application Date: 2016-10-07
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Publication No.: US09754674B2Publication Date: 2017-09-05
- Inventor: Violante Moschiano , Mattia Cichocki , Tommaso Vali , Maria-Luisa Gallese , Umberto Siciliani
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/26 ; G11C8/06 ; G11C8/12 ; G11C11/56 ; G11C16/32
Abstract:
In an embodiment, a first page of memory cells in a first memory plane is read concurrently with a second page of memory cells in a second memory plane. The second memory plane is different than the first memory plane, but is in the same memory array as the first memory plane. The second page of memory cells has a different page address than the first page of memory cells.
Public/Granted literature
- US20170025181A1 CONCURRENTLY READING FIRST AND SECOND PAGES OF MEMORY CELLS HAVING DIFFERENT PAGE ADDRESSES Public/Granted day:2017-01-26
Information query
