A resistance random access memory device includes a control circuit. The control circuit applies a first voltage between the plurality of second interconnects and one of the first interconnects for a first time when switching resistance states of the variable resistance members from a first state to a second state, and the control circuit applies a second voltage between the plurality of second interconnects and the one of the first interconnects for a second time after applying the first voltage when the resistance state of one or more of the variable resistance members of a plurality of the variable resistance members connected to the one of the first interconnects is in the first state. The second voltage has the same polarity as the first voltage and is lower than the first voltage. The second time is longer than the first time.