Invention Grant
- Patent Title: Circuit board having a ground layer including a plurality of polygonal openings
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Application No.: US15448443Application Date: 2017-03-02
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Publication No.: US09847306B2Publication Date: 2017-12-19
- Inventor: Fongru Lin , Yoshihiro Iida
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Patterson & Sheridan, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/66 ; H01L23/552 ; H01L23/498 ; H05K1/18 ; H01L23/495
Abstract:
A circuit board includes an insulating layer, a ground layer formed on a first surface of the insulating layer and including a plurality of openings arranged in first and second surface directions, each of the openings having a shape of a polygon having five or more sides, and a wiring layer formed on a second surface of the insulating layer opposite to the first surface.
Public/Granted literature
- US20170271282A1 CIRCUIT BOARD HAVING A GROUND LAYER INCLUDING A PLURALITY OF POLYGONAL OPENINGS Public/Granted day:2017-09-21
Information query
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