Photonic integration has primarily sought to exploit optical parallelism through wavelength division multiplexing whilst in many instances “brute-force” time division multiplexing offers benefits through reduced complexity and cost. However, photoreceivers are primarily the same now for operation at 10 Gb/s, 20 Gb/s, 40 Gb/s and above as 20 or 25 years ago and exploit the same optical detection—amplification—logic processing design. However, high speed low cost electronics ca be leveraged in conjunction with optical time sampling and logic to provide a new design paradigm. An incoming XGbs−1 optical data stream is sampled and processed by N photodetectors each operating at (X/N)Gbs−1 rather than the current direct XGbs−1 front-end of the prior art. Flexibility for the designer in establishing N within optical layer constraints, electronics capabilities etc. allows for further cost—power—complexity—performance tradeoffs to be established in different systems such that high capacity TDM links can exploit direct CMOS integrated optoelectronic front-ends.