Invention Grant
- Patent Title: Method for etching a silicon-containing substrate
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Application No.: US15243476Application Date: 2016-08-22
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Publication No.: US09966312B2Publication Date: 2018-05-08
- Inventor: Sergey Voronin , Alok Ranjan
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Wood Herron & Evans LLP
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/461 ; H01L21/336 ; H01L21/331 ; B44C1/22 ; C03C15/00 ; C03C25/68 ; G01L21/30 ; C23F1/00 ; H01L21/8234 ; H01L21/3213 ; H01L21/02 ; C11D11/00 ; H01L21/3065 ; H01L21/74

Abstract:
Techniques herein provide a chamber and substrate cleaning solution for etching and removing byproducts between separate etching steps. Such techniques include using a cleaning step based on fluorine chemistry, which is executed in between separate etch steps or divided etch steps. Such a technique can be executed in situ for improved efficiency. Other benefits include increasing etching depth/aspect ratios, and preventing post-etching defects including physical contact with neighboring gates, etc. Techniques herein are especially beneficial when applied to relatively small feature openings.
Public/Granted literature
- US20170062225A1 Method for Etching a Silicon-Containing Substrate Public/Granted day:2017-03-02
Information query
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