Invention Grant
- Patent Title: Three-dimensional passive components
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Application No.: US14964451Application Date: 2015-12-09
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Publication No.: US09969001B2Publication Date: 2018-05-15
- Inventor: Rahul P. Panat , Deuk H. Heo
- Applicant: Washington State University
- Applicant Address: US WA Pullman
- Assignee: Washington State University
- Current Assignee: Washington State University
- Current Assignee Address: US WA Pullman
- Agency: Lee & Hayes, PLLC
- Main IPC: B22F3/105
- IPC: B22F3/105 ; G06F1/16 ; H01F27/24 ; H01F27/28 ; H01F41/02 ; H01F41/04 ; H01G4/12 ; H01P11/00 ; H05K1/02 ; H05K1/03 ; H05K1/09 ; H05K3/14 ; H05K3/22 ; H05K3/46 ; H01G4/002 ; B22F3/00 ; B33Y10/00 ; B33Y50/02 ; H05K1/16 ; B33Y80/00 ; B22F1/00

Abstract:
Three-dimensional inductors may comprise a passivation layer disposed on a substrate, a three-dimensional pillar comprising a ferromagnetic material disposed on the substrate or the passivation layer, and a conductive trace wound at least partially around the pillar. Three-dimensional capacitors may comprise a passivation layer disposed on a substrate, at least two support pillars comprising a polymeric material disposed on the passivation layer or the substrate, at least two electrodes disposed between the support pillars, a dielectric disposed between the electrodes, and a metal trace. Methods of manufacturing the three-dimensional passives, such as inductors and capacitors, may comprise direct writing the components and curing them for on-chip applications.
Public/Granted literature
- US20160172099A1 THREE-DIMENSIONAL PASSIVE COMPONENTS Public/Granted day:2016-06-16
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