公开(公告)号：US09969001B2

公开(公告)日：2018-05-15

申请号：US14964451

申请日：2015-12-09

Applicant: Washington State University

Inventor： Rahul P. Panat ,  Deuk H. Heo

IPC: B22F3/105 ,  G06F1/16 ,  H01F27/24 ,  H01F27/28 ,  H01F41/02 ,  H01F41/04 ,  H01G4/12 ,  H01P11/00 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H05K3/14 ,  H05K3/22 ,  H05K3/46 ,  H01G4/002 ,  B22F3/00 ,  B33Y10/00 ,  B33Y50/02 ,  H05K1/16 ,  B33Y80/00 ,  B22F1/00

CPC classification number: B22F3/1055 ,  B22F1/0018 ,  B22F3/008 ,  B22F2003/1058 ,  B33Y10/00 ,  B33Y50/02 ,  B33Y80/00 ,  C22C2202/02 ,  G06F1/163 ,  H01F17/0006 ,  H01F17/0033 ,  H01F27/24 ,  H01F27/2804 ,  H01F41/0206 ,  H01F41/046 ,  H01G4/002 ,  H01G4/1218 ,  H01P11/001 ,  H05K1/028 ,  H05K1/0283 ,  H05K1/0296 ,  H05K1/0313 ,  H05K1/0393 ,  H05K1/09 ,  H05K1/165 ,  H05K3/14 ,  H05K3/22 ,  H05K3/4644 ,  H05K2201/0162

Abstract: Three-dimensional inductors may comprise a passivation layer disposed on a substrate, a three-dimensional pillar comprising a ferromagnetic material disposed on the substrate or the passivation layer, and a conductive trace wound at least partially around the pillar. Three-dimensional capacitors may comprise a passivation layer disposed on a substrate, at least two support pillars comprising a polymeric material disposed on the passivation layer or the substrate, at least two electrodes disposed between the support pillars, a dielectric disposed between the electrodes, and a metal trace. Methods of manufacturing the three-dimensional passives, such as inductors and capacitors, may comprise direct writing the components and curing them for on-chip applications.

公开(公告)号：US20160172099A1

公开(公告)日：2016-06-16

申请号：US14964451

申请日：2015-12-09

Applicant: Washington State University

Inventor： Rahul P. Panat ,  Deuk H. Heo

IPC: H01F27/28 ,  H01F41/04 ,  H01F41/02 ,  H01F27/24 ,  H01G4/12

CPC classification number: B22F3/1055 ,  B22F1/0018 ,  B22F3/008 ,  B22F2003/1058 ,  B33Y10/00 ,  B33Y50/02 ,  B33Y80/00 ,  C22C2202/02 ,  G06F1/163 ,  H01F17/0006 ,  H01F17/0033 ,  H01F27/24 ,  H01F27/2804 ,  H01F41/0206 ,  H01F41/046 ,  H01G4/002 ,  H01G4/1218 ,  H01P11/001 ,  H05K1/028 ,  H05K1/0283 ,  H05K1/0296 ,  H05K1/0313 ,  H05K1/0393 ,  H05K1/09 ,  H05K1/165 ,  H05K3/14 ,  H05K3/22 ,  H05K3/4644 ,  H05K2201/0162

Abstract: Three-dimensional inductors may comprise a passivation layer disposed on a substrate, a three-dimensional pillar comprising a ferromagnetic material disposed on the substrate or the passivation layer, and a conductive trace wound at least partially around the pillar. Three-dimensional capacitors may comprise a passivation layer disposed on a substrate, at least two support pillars comprising a polymeric material disposed on the passivation layer or the substrate, at least two electrodes disposed between the support pillars, a dielectric disposed between the electrodes, and a metal trace. Methods of manufacturing the three-dimensional passives, such as inductors and capacitors, may comprise direct writing the components and curing them for on-chip applications.

Abstract translation: 三维电感器可以包括设置在衬底上的钝化层，包括设置在衬底或钝化层上的铁磁材料的三维柱，以及至少部分地围绕柱体缠绕的导电迹线。 三维电容器可以包括设置在衬底上的钝化层，至少两个支撑柱，其包括设置在钝化层或衬底上的聚合材料，设置在支撑柱之间的至少两个电极，设置在电极之间的电介质和 金属痕迹。 制造三维无源元件（例如电感器和电容器）的方法可以包括直接写入元件并固化它们用于片上应用。