公开(公告)号：KR101949225B1

公开(公告)日：2019-04-26

申请号：KR1020120039237

申请日：2012-04-16

Applicant: 삼성디스플레이 주식회사 ,  국민대학교산학협력단

Inventor： 임지훈 ,  안병두 ,  김건희 ,  박준현 ,  이제훈 ,  박재우 ,  김대환 ,  정현광 ,  김재형

IPC: H01L29/786 ,  H01L21/336

公开(公告)号：KR1020130116651A

公开(公告)日：2013-10-24

申请号：KR1020120039237

申请日：2012-04-16

Applicant: 삼성디스플레이 주식회사 ,  국민대학교산학협력단

Inventor： 임지훈 ,  안병두 ,  김건희 ,  박준현 ,  이제훈 ,  박재우 ,  김대환 ,  정현광 ,  김재형

IPC: H01L29/786 ,  H01L21/336

CPC classification number: G02F1/1368 ,  H01L29/41733 ,  H01L29/7869 ,  H01L27/1225

Abstract: PURPOSE: A thin film transistor, a display device having the same, and a method for manufacturing the same are provided to reduce the negative shift phenomenon of a threshold voltage by preventing a light negative bias thermal stress (LNBTS). CONSTITUTION: A gate electrode (GE) is formed on a base substrate. A first insulating layer is formed on the gate electrode. A semiconductor layer (SM) is formed on the first insulating layer. A source electrode (SE) is formed on the semiconductor layer. A drain electrode (DE) is formed on the first insulating layer.

Abstract translation: 目的：提供薄膜晶体管，具有该薄膜晶体管的显示装置及其制造方法，以通过防止光负偏压热应力（LNBTS）来减小阈值电压的负偏移现象。 构成：在基底基板上形成栅电极（GE）。 在栅电极上形成第一绝缘层。 半导体层（SM）形成在第一绝缘层上。 在半导体层上形成源电极（SE）。 漏电极（DE）形成在第一绝缘层上。

公开(公告)号：KR1020130046317A

公开(公告)日：2013-05-07

申请号：KR1020110110835

申请日：2011-10-27

Applicant: 국민대학교산학협력단

Inventor： 김대환 ,  김동명 ,  김재형 ,  정현광

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/78696 ,  H01L29/06 ,  H01L29/78663

Abstract: PURPOSE: An amorphous semiconductor thin film transistor with an active layer doped with different concentrations and a manufacturing method thereof are provided to improve stability by making the doping concentration of a semiconductor layer different. CONSTITUTION: A gate is formed on a substrate. A gate insulating layer is formed on the gate. Semiconductor layers doped with different concentrations are laminated to form an active layer(140). A source(150) is in contact with the active layer. A drain(160) is in contact with the active layer.

Abstract translation: 目的：提供具有掺杂不同浓度的有源层的非晶半导体薄膜晶体管及其制造方法，以通过使半导体层的掺杂浓度不同而提高稳定性。 构成：在基板上形成栅极。 在栅极上形成栅极绝缘层。 掺杂不同浓度的半导体层被层压以形成有源层（140）。 源（150）与有源层接触。 漏极（160）与有源层接触。

公开(公告)号：KR1020140048746A

公开(公告)日：2014-04-24

申请号：KR1020120115045

申请日：2012-10-16

Applicant: 삼성디스플레이 주식회사 ,  국민대학교산학협력단

Inventor： 안병두 ,  임지훈 ,  임준형 ,  김대환 ,  김재형 ,  이제훈 ,  정현광

IPC: H01L29/786 ,  G02F1/1368 ,  H01L51/50

CPC classification number: H01L29/78606 ,  H01L21/28 ,  H01L27/124 ,  H01L29/786 ,  H01L29/78678 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2251/558

Abstract: A thin film transistor array board is provided. A thin film transistor array board according to an embodiment of the present invention includes a substrate, a gate electrode which is located on the substrate, a gate insulating layer which is located on the gate electrode, a semiconductor layer which is located on the gate insulating layer and includes a channel region, a source electrode and a drain electrode which are located on the semiconductor layer and face each other, and a protection layer which covers the source electrode, the drain electrode, and the semiconductor layer. The semiconductor layer includes a first part which is overlapped with the source electrode and the gate electrode, and a second part which is overlapped with the drain electrode and the gate electrode. The first part of the semiconductor layer includes a hill part which protrudes from the first part.

Abstract translation: 提供薄膜晶体管阵列板。 根据本发明实施例的薄膜晶体管阵列板包括衬底，位于衬底上的栅电极，位于栅电极上的栅极绝缘层，位于栅绝缘层上的半导体层 层，并且包括位于半导体层上并且彼此面对的沟道区域，源电极和漏极电极以及覆盖源电极，漏电极和半导体层的保护层。 半导体层包括与源电极和栅电极重叠的第一部分和与漏电极和栅电极重叠的第二部分。 半导体层的第一部分包括从第一部分突出的山部分。