公开(公告)号：KR1019920013179A

公开(公告)日：1992-07-28

申请号：KR1019900021825

申请日：1990-12-26

Applicant: 한국전자통신연구원

Inventor： 김현기 ,  이혁회 ,  황선호 ,  채영도

IPC: G06F13/38

Abstract: 내용 없음

公开(公告)号：KR100066822B1

公开(公告)日：1993-10-23

申请号：KR1019900021825

申请日：1990-12-26

Applicant: 한국전자통신연구원

Inventor： 김현기 ,  이혁회 ,  황선호 ,  채영도

IPC: G06F13/38

公开(公告)号：KR1019930007022B1

公开(公告)日：1993-07-26

申请号：KR1019900021825

申请日：1990-12-26

Applicant: 한국전자통신연구원

Inventor： 김현기 ,  이혁회 ,  황선호 ,  채영도

IPC: G06F13/38

Abstract: The data communication circuit supports digital serial communication between interface board of a personal computer and twisted pair cable of field bus. The data communication circuit includes a Manchester encoder/decoder (2) for generating encoder and decoder clock signal according to the control signal transmitted from a CPU and for encoding and decoding I/O data signal, a latch/shift register (3) for converting 8 bit parallel data of a CPU (1) to 1 byte serial data to transmit parallel data to the encoder/decoder (2) and for converting 1 byte serial data comins from the encoder/decoder (2) to 8 bit parallel data, a CRC generator (4) for generating CRC check frame and for checking data transmission error, and a driver/receiver (5) for driving and receiving data between the Manchester encoder/decoder (2) and field bus.

Abstract translation: 数据通信电路支持个人计算机接口板与现场总线双绞线之间的数字串行通信。 数据通信电路包括：曼彻斯特编码器/解码器（2），用于根据从CPU发送的控制信号和用于编码和解码I / O数据信号产生编码器和解码器时钟信号;锁存/移位寄存器（3），用于转换 将CPU（1）的8位并行数据转换为1字节的串行数据，以将并行数据发送到编码器/解码器（2），并将1字节串行数据从编码器/解码器（2）转换为8位并行数据， 用于产生CRC校验帧和用于检查数据传输错误的CRC发生器（4）以及用于在曼彻斯特编码器/解码器（2）和现场总线之间驱动和接收数据的驱动器/接收器（5）。

公开(公告)号：KR1019920013991A

公开(公告)日：1992-07-30

申请号：KR1019900021840

申请日：1990-12-26

Applicant: 한국전자통신연구원

Inventor： 김현기 ,  이전우 ,  이혁회 ,  채영도

IPC: H04L12/00

Abstract: 내용 없음

公开(公告)号：KR100064981B1

公开(公告)日：1993-09-01

申请号：KR1019900021840

申请日：1990-12-26

Applicant: 한국전자통신연구원

Inventor： 김현기 ,  이전우 ,  이혁회 ,  채영도

IPC: H04L12/00

公开(公告)号：KR1019930004099B1

公开(公告)日：1993-05-20

申请号：KR1019900021840

申请日：1990-12-26

Applicant: 한국전자통신연구원

Inventor： 김현기 ,  이전우 ,  이혁회 ,  채영도

IPC: H04L12/00

Abstract: The method transmits/receives data of a small quantity speedily without any error between boards in a field bus network system apart at a short communication distance. It four stages: the 1st stage for initializing the hardware of the system; the 2nd stage for transmitting 1 byte data while allocating output port; the 3rd stage for performing an interrupt routine to transmit the next 1 byte data; and the 4th stage for completing data transmission.

Abstract translation: 该方法在短的通信距离内，在现场总线网络系统中的板之间快速地发送/接收少量的数据而没有任何错误。 四个阶段：初始化系统硬件的第一阶段; 分配输出端口时发送1字节数据的第二级; 用于执行中断例程以发送下一个1字节数据的第三阶段; 和完成数据传输的第四阶段。