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公开(公告)号:DE69031815D1
公开(公告)日:1998-01-29
申请号:DE69031815
申请日:1990-05-16
Applicant: IBM
Inventor: FREEMAN BOBBY JOE , DINWIDDIE JOHN MONROE , GRICE LONNIE EDWARD , LOFFREDO JOHN MARIO , SANDERSON KENNETH RUSSELL , SUAREZ GUSTAVO ARMANDO
Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
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公开(公告)号:DE69031093D1
公开(公告)日:1997-08-28
申请号:DE69031093
申请日:1990-05-16
Applicant: IBM
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公开(公告)号:DE69113240T2
公开(公告)日:1996-03-28
申请号:DE69113240
申请日:1991-11-20
Applicant: IBM
IPC: G06F13/10 , G06F3/14 , G09G1/16 , G09G5/00 , G09G5/02 , G09G5/14 , G09G5/36 , G09G5/39 , H04N5/222 , H04N5/265
Abstract: An information handling apparatus for transferring and composing image signals for display. The apparatus includes a bus adapted to allow selective access for multiple independent image signals generated by respective independent image sources. The selective access enables composition of the independent image signals in response to control information; the composition enables real time display of a composed image signal.
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公开(公告)号:DE3071822D1
公开(公告)日:1986-12-11
申请号:DE3071822
申请日:1980-06-24
Applicant: IBM
Inventor: DINWIDDIE JOHN MONROE , FREEMAN BOBBY JOE , JACKSON TIMOTHY , ZIPOY WILLIAM LEWIS
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公开(公告)号:DE69032632T2
公开(公告)日:1999-05-27
申请号:DE69032632
申请日:1990-05-16
Applicant: IBM
Inventor: BAKER ERNEST DYSART , DINWIDDIE JOHN MONROE , GRICE LONNIE EDWARD , JOYCE JAMES MAURICE , LOFFREDO JOHN MARIO , SANDERSON KENNETH RUSSELL , SUAREZ GUSTAVO ARMANDO
IPC: G06F11/00 , G06F11/10 , G06F11/16 , G06F11/18 , G06F11/20 , G06F15/16 , G06F15/173 , G06F15/177 , G06F9/44
Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
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公开(公告)号:DE69032632D1
公开(公告)日:1998-10-15
申请号:DE69032632
申请日:1990-05-16
Applicant: IBM
Inventor: BAKER ERNEST DYSART , DINWIDDIE JOHN MONROE , GRICE LONNIE EDWARD , JOYCE JAMES MAURICE , LOFFREDO JOHN MARIO , SANDERSON KENNETH RUSSELL , SUAREZ GUSTAVO ARMANDO
IPC: G06F11/00 , G06F11/10 , G06F11/16 , G06F11/18 , G06F11/20 , G06F15/16 , G06F15/173 , G06F15/177 , G06F9/44
Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
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公开(公告)号:DE69221341T2
公开(公告)日:1998-02-12
申请号:DE69221341
申请日:1992-01-22
Applicant: IBM
Inventor: DINWIDDIE JOHN MONROE , FREEMAN BOBBY JOE , MICALLEF THOMAS JOHN , SUAREZ GUSTAVO ARMANDO , WILKIE BRUCE JAMES
Abstract: A multimedia solution is presented which allows a multimedia architecture to be implemented on an existing computer system. According to the invention, an expansion unit which incorporates a multimedia architecture is provided. The expansion unit is connected to an existing computer system via an expansion slot of an I/O bus of the existing computer as well as via a display device output terminal of the computer. The expansion unit is also connected to a display device. Accordingly, the expansion unit controls the presentation which is provided on the display device.
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公开(公告)号:DE69113235D1
公开(公告)日:1995-10-26
申请号:DE69113235
申请日:1991-11-20
Applicant: IBM
IPC: G06F3/14 , G06T1/00 , G06T3/00 , G06T11/80 , G09G1/16 , G09G5/00 , G09G5/14 , H04H60/04 , H04N5/262
Abstract: An information handling apparatus for transferring and composing image signals including a plurality of media sources configured to provide a corresponding plurality of image signals, a media bus connected to the media sources, and a media control module coupled to the media bus. The media bus allows selective access for the plurality of image signals. The selective access enables composition of the independent image signals in response to control information. The media control module receives a composed image signal from the media bus and to provides the composed image signal to a display device.
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公开(公告)号:AU537478B2
公开(公告)日:1984-06-28
申请号:AU5908080
申请日:1980-06-05
Applicant: IBM
Inventor: DINWIDDIE JOHN MONROE , FREEMAN BOBBY JOE , JACKSON TIMOTHY , ZIPOY WILLIAM LEWIS
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公开(公告)号:IN191489B
公开(公告)日:2003-12-06
申请号:IN422DE1995
申请日:1995-03-13
Applicant: IBM
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