公开(公告)号：DE19818202A1

公开(公告)日：1998-11-05

申请号：DE19818202

申请日：1998-04-23

Applicant: IBM

Inventor： GERWIG GUENTHER DIPL ING ,  HAESS JUERGEN DIPL ING

IPC: G06F7/50 ,  H03M7/12

Abstract: The conversion from binary numbers into binary coded decimal format is conventionally carried out by having the binary number represented in hexadecimal format and then carrying out addition in 8 4 2 1 coding in a tree type structure. The high speed process uses a binary structure containing an additional bit with a 5 weighting. This allows a data compression to take place.

公开(公告)号：DE19631289A1

公开(公告)日：1998-02-05

申请号：DE19631289

申请日：1996-08-02

Applicant: IBM

Inventor： FERRAIOLO FRANK D ,  GOTTSTINE DON ,  HAESS JUERGEN DIPL ING ,  HANLEY JOSEPH B ,  HILLOCK THOMAS H ,  JUNG DONALD

IPC: H04L12/26 ,  H04L29/06 ,  G06F13/42

Abstract: The computer system uses a process to test a second protocol converter 58 with the aid of a first converter 56. The data structure of a specific protocol A is converted into a second protocol B data structure. The test process has the computer system 50 with a slow protocol coupled to the first converter 56 and is then coupled to the fast response protocol interface 49 of the converter being tested. An interface 48 connects peripherals to this converter. The process operates to obtain symmetry in the conversion.